1. Field of the Invention
The present invention relates to circuit boards and methods for fabricating the same, and more particularly, to a circuit board having an electrically connecting structure and a method for fabricating the circuit board.
2. Description of the Prior Art
The electronic industry has boomed and brought multi-functional and high-performance electronic products. For use with highly integrated and miniaturized semiconductor packages to incorporate more active components and package components therein, circuit boards having high-density circuit layout have been developed. The high-density circuit layout makes the circuit boards feasible for the miniaturized and multi-functional electronic products, allowing the circuit layout area in the circuit boards (having a limited space) to be increased by an interlayer connection technique, that is, more circuits and electronic components can be incorporated per unit area of the circuit boards. Thereby, such circuit boards are applicable to high-density integrated circuits while the thickness of the circuit boards may even be advantageously reduced.
It is also considered necessary to improve the functions, such as chip signal transmission, bandwidth enhancement, impedance control, etc., of the circuit boards in response to the computation requirements of microprocessors, chipsets and graphic chips and the high I/O number of packages. Further, the circuit boards have been made having fine circuits and small openings, so as for use with miniaturized, multi-functional, high-speed and high-frequency semiconductor packages. The circuit dimensions (including line width, pitch space, etc.) of the circuit boards have been decreased from 100 μm to less than 25 μm, and would be further decreased in the future.
Normally, electrically connecting pads formed on a surface of a multi-layer circuit board are used to allow the circuit board to be electrically connected to other electronic devices, such as a semiconductor chip or a passive component. However, not all electrode pads of the semiconductor chip or passive component are used for electrical connection. Some of the electrode pads, which are not for electrical connection, are used to prevent uneven distribution of stress when the semiconductor chip or passive component is electrically connected to the circuit board. This is important because uneven stress would cause delamination between the chip and the circuit board after an encapsulation process is completed, and excessive stress may even lead to cracking of the chip.
FIGS. 1A to 1D show a conventional method for fabricating a circuit board having an electrical connecting structure thereon. As shown in FIG. 1A, first, a circuit board body 10 having inner-layer circuits 100 is provided. A circuit layer 101 is formed on at least an outermost surface of the circuit board body 10. The circuit board body 10 also has a plurality of electrically connecting pads 102, 102′, wherein some of the electrically connecting pads 102 are electrically connected to the circuit layer 101, some of the electrically connecting pads 102 are electrically connected to the inner-layer circuits 100 via conductive vias 103, and the remaining electrically connecting pads 102′ are not used for electrical connection. An insulating protective layer 11 is further disposed on the circuit board body 10, wherein a plurality of openings 110 are formed in the insulating protective layer 11 to partially expose surfaces of the electrically connecting pads 102, 102′. Then, as shown in FIG. 1B, a conductive layer 12 is formed on the insulating protective layer 11, in the openings 110 and on the partially exposed surfaces of the electrically connecting pads 102, 102′. A resist layer 13 is disposed on the conductive layer 12, and is formed with a plurality of cavities 130 therein for exposing a portion of the conductive layer 12 located in the openings 110 of the insulating protective layer 11. As shown in FIG. 1C, a conductive material 14 is electroplated in the cavities 130 and the openings 110, and is thus formed on the electrically connecting pads 102, 102′. As shown in FIG. 1D, the resist layer 13 and a portion of the conductive layer 12 thereunder are removed so as to expose the conductive material 14.
It is not desirable that, the electrically connecting pads 102′ are not used for electrical connection but are still required in the circuit layer 101, and the conductive material 14 has to be formed in the insulating protective layer 11. This arrangement is not spatially effective because the electrically connecting pads 102′ (not for electrical connection) occupy a certain space of the circuit board where functional circuits cannot be disposed, thereby unfavorable for high circuit-density circuit boards with circuits being formed more and more densely.
Therefore, the problem to be solved here is to provide a circuit board with desirable electrically connecting pads that occupy little space of the circuit board, so as to enhance the circuit layout density and avoid uneven distribution of stress in forming electrical connection with other electronic components.